My research lab is conducting SEU mitigation research and we are interested in performing fault injection on a Stratix 10 FPGA. We have the proper licenses and a board to work with, but we need further guidance. What do we need to do to perform Fault Injection on a Stratix 10 FPGA?
You can performed fault injection using Fault Injection Debugger through GUI or command line. Please refer to https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/stratix-10/ug-s10-seu.pdf chapter 2.5.1