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How to generate .sof file for IP evaluation in tethered mode

HTork
Beginner
1,875 Views

I'm using Intel Quartus Prime Lite 18.0.0 with the

"Intel Cyclone 10 LP FPGA Triple-Speed Ethernet and Intel On-Board PHY Chip Reference Design"

 

When compiling the design I get the following error:

"Warning (115003): Can't generate programming files for your current project because you do not have a valid license for the following IP core or cores.

  Warning (115005): Unlicensed IP: "Triple-Speed Ethernet(6AF7 00BD)"..."

 

How can I generate a .sof file to test the design in tethered mode using

Quartus Prime Lite 18.0.0?

 

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AnandRaj_S_Intel
Employee
1,492 Views

Hi @HTork​ ,

 

To enable Intel FPGA IP Evaluation Mode.

 During Intel® FPGA IP Evaluation Mode, the Compiler only generates a time-limited device programming file (<project name> _time_limited.sof) that expires at the time limit.

 

  1. In the Intel Quartus Prime software, click Assignments > Settings > Compilation Process Settings.
  2. Click the More Settings button.
  3. For Intel® FPGA IP Evaluation Mode , select enable.

 

Refer

https://www.intel.com/content/www/us/en/programmable/documentation/akc1496248329442.html#wwy1496248963591

 

 Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

 

Regards

Anand

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HTork
Beginner
1,492 Views

Hi,

Yes, the Intel FPGA IP Evluation Mode is allready Enabled.

I tried to disable it an then enable it again pefore compiling, but I still get the same warning about the programming file.

 

Regards,

Hans

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AnandRaj_S_Intel
Employee
1,492 Views

Hi,

 

The problem is "Triple-Speed Ethernet" does not support the Intel FPGA IP Evaluation Mode feature.

We Can't generate programming files because we do not have a valid license for the following IP core or cores.

 

I have used example from below link & Quartus 18.0. which does not generates programming file with below warnings

Warning (12189): Intel FPGA IP Evaluation Mode (Simulation-Only) feature is turned on for all cores in the design

Warning (12191): Some cores in this design do not support the Intel FPGA IP Evaluation Mode feature

Warning (12192): "Triple-Speed Ethernet" does not support the Intel FPGA IP Evaluation Mode feature

Warning (115003): Can't generate programming files for your current project because you do not have a valid license for the following IP core or cores.

 

https://fpgacloud.intel.com/devstore/platform/18.0.0/Standard/intel-cyclone-10-lp-fpga-triple-speed-ethernet-and-intel-on-board-phy-chip-reference-design/

 

Kindly check the warning from Quartus message log.

 

Refer

https://www.intel.com/content/www/us/en/programmable/support/support-resources/download/megacore-ip.html

 

Regards

Anand

 

 

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HTork
Beginner
1,492 Views

Triple speed ethernet is opencore IP.

Note that I'm using Intel Quartus Prime Lite 18.0.0.

Some help would be greatly appreciated:-)

 

 

 

 

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HTork
Beginner
1,492 Views

Thanks,

I now see that I get all the warnings that you list:

Warning (12189): Intel FPGA IP Evaluation Mode (Simulation-Only) feature is turned on for all cores in the design

Warning (12191): Some cores in this design do not support the Intel FPGA IP Evaluation Mode feature

Warning (12192): "Triple-Speed Ethernet" does not support the Intel FPGA IP Evaluation Mode feature

Warning (115003): Can't generate programming files for your current project because you do not have a valid license for the following IP core or cores.

 

I's nor clear to me how I can obtain a license for this IP so I can compile the design and make changes to it.

Could you please explain in some detail how you do that.

 

Kind regards,

Hans

 

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AnandRaj_S_Intel
Employee
1,492 Views

Hi,

 

Sorry for late reply.

You must obtain a license for the Intel FPGA IP to generate programming files that you may use for an unlimited time. To obtain a license file, visit the Self-Service Licensing Center or contact your local Intel FPGA representative.

Contact your local sales or distributor for more details.

 

Regards

Anand

 

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