IP Core "LPM_MULT" - who much pipeline cycles I'm need to config?

[Amir3]

Hi,

I work with Cyclone 5 and in general I set a pipeline for 3 clock cycles.

I would love to know if there is any equation to the amount of clock cycles that need to be set? An equation that depends on the clock rate, the number of bits at the input and more..

If there is no such equation, just need to refer to timing reports?

[Ash_R_Intel · Accepted solution]

Hi,

There is no equation for number of pipeline registers. It is design-specific decision. More the pipeline registers, better the timing performance. On the other hand, it also results in increased resources and more latency in the design.

Regards