IP core query

FPGA Intellectual Property

PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP

IP core query

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Hello everyone,

Can somebody tell me what are the steps involved in designing a basic IP core ? How different it is from RTL design? Can I generate a single netlist for all vendors just by changing the wrapper code? In one of my projects, I have designed a CAN interface without using an IP core and it works fine. If I wanted to design a IP core for the same, how different it should be from RTL design ? Also can anyone let me know the verification process for the same?

Thanks in Advance.

Abhishek.

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