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Altera_Forum
Honored Contributor I
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IP generated by Intel HLS Compiler is Missing Module IP in Platform Designer (Qsys)

Hi,  

 

Sorry for my poor English!!!:oops: 

-- 

 

 

Intel HLS Compiler (i++) can generate IP component for Platform Designer. 

I can make IP component by i++. 

 

I make my project in Quartus Prime and open Platform Designer. 

Next I select "IP Catalog / Generic Component" to use i++ components.  

I select "xxx.ip" file generated by i++. 

But IP generated is Missing IP.  

 

And display  

 

"Error: xxx.xxxx_internal_inst: Component xxxx_internal 1.0 not found or could not be instantiated" :mad: 

 

in Parameters Parametarization Message. 

 

why ?:( 

 

thanks to read.
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