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I have recently purchased the Bitec DisplayPort (rev 11) Daughter card (https://bitec-dsp.com/product/fmc-displayport-daughter-card-revision-11/) and would like to get it up and running using the DisplayPort Intel® Stratix 10 FPGA IP Design Example (https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-dex-s10-dp.pdf). Bitec has informed me that their new Rev 11 card has a new retimer chip which needs to be programmed as well as some lane polarity inversions. Does the Intel example provided in Quartus pro v19.1 take this into account?
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Hi Daniel,
Unfortunately, as you can see from the S10 design example user guide doc page 10. Intel only validated till Bitec Daughter card version 10 and showing the way to configure it in design example.
Bitec Daughter card version 11 is still under internal validation and may be supported in future Quartus release version but not on Quartus v19.1.
Thanks.
Regards,
dlim
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