Is there a 10/100M Ethernet (Fiber/Copper) PHY IP core for Cyclone IV E or Cyclone V

[Altera_Forum]

Is there a free/comercial 10/100M Ethernet (Fiber/Copper) PHY IP core for Cyclone IV E or Cyclone V device? 

 I have instantiated the MAC IP Core " Triple Speed Ethernet V10.1", which should have PHY module (PCS + PMA) included according to the IP core user guide. However, I find there is no different Rx and Tx signals for connection to external Fiber-optical transceiver or transformer (for copper port) in the generated component declaration by MegaWizard. 

[Altera_Forum]

Probably You're missing something. There should be such port. Check the manual.

[Altera_Forum]

According to the IP core user guide, the output of the module is 1.25Gbps MDI interface signals,they are: ref_clk, rx_p and tx_p.  

 rx_p and tx_p are serial differential rx/tx interface. Do we need a component to convert the rx_p and tx_p signals into differential signals and then connect them to the fiber transceiver?

[Altera_Forum]

Oh You need only 10/100... rx_p/tx_p signals will have negative pair member, when You'll select LVDS or other differential signaling type in pin planner.

[Altera_Forum]

Because the IP core interface is 1.25Gbps, I think it can not be supported by Cyclone IV E. 

What is need is to implement a 10/100M MAC and PHY in Cyclone IV E FPGA.

[Altera_Forum]

You can't have PHY part in FPGA, which doesn't have transceivers. Basically, even if it has, the PHY part is usually external.

[Altera_Forum]

We had a design with Cyclone II, which implements a 10/100M MAC and PHY for fiber port on FPGA without using an external PHY.

[Altera_Forum]

--- Quote Start ---  We had a design with Cyclone II, which implements a 10/100M MAC and PHY for fiber port on FPGA without using an external PHY.  --- Quote End ---    If you have the source , you just use that in your Cyclone iV design.

[Altera_Forum]

I would like to know if there is a commercial / free PHY IP core for Ethernet Fiber/Copper port. 

 I can not get the detailed info and the source code of the PHY IP core used for cyclone II.

[Altera_Forum]

I don't see how the RX PLL for a fibre PHY should be implemented in Cyclone II, perhaps you can tell the name of PHY IP you have used. In any case, there's no Altera (or a competitor's) FPGA that incoprporates the 10/100 MBit ethernet "copper" interface. The only copper interface supported by Altera FPGA on-board hardware so far is a 1000BASE-CX "short haul copper" interface, not compatible with the industry standard 1000BASE-T twisted pair interfaces.

[Altera_Forum]

Sorry, I do not understand your answer. 

 If you said that the PHY should be placed outside the FPGA, why does the IP core "Triple Speed Ethernet V10.1" contain a PHY module (PCS + PMA) ?

[Altera_Forum]

A more detailed description of Triple Speed Ethernet's PHY part spells "1000BASE-X/SGMII PCS With Optional Embedded PMA". For other media an external PHY is required. Just review the Triple Speed application examples.  

 Apart from the clear description of the IP core, the answer is also obvious when considering the required hardware features of an ethernet PHY.

[Altera_Forum]

--- Quote Start ---    I can not get the detailed info and the source code of the PHY IP core used for cyclone II.  --- Quote End ---    Can you tell us the manufacturer and part number of the fibre optic transmitter?

[Altera_Forum]

I got the confirmation that the PHY (a Serdes module) is developed by ourselves. 

The fiber optic transmitter is QFBR-5750APZ supplied by Avago