I have a large project which includes VIP cores providing scaling and frame converting from standard VGA to HDMI FullHD.
After numerous tries i found that FullHD is possible only if i use at least 2 pixels in parallel. With 2 parallel pixels VIP part occupies too much LE and cannot fit into FPGA. VIP part uses frame buffer IP. I could save some LE if Frame Buffer would allow to choose amount of parallel pixels separately for write and read channels. standard VGA resolution doesn't require high speed processing. But it doesn't allow. So, i have to use 2 parallel pixels for whole VIP. Is there a standard IP to convert amount of parallel pixels to save the LE?