I'm trying to make an SPI educational tutorial and I'm trying to connect the JTAG to Avalon Master Bridge Intel FPGA IP core to SPI(3 Wire Serial) Intel FPGA IP core, so I could create SPI transactions through JTAG using the System Console.
On the other side I'll have another FPGA device with the SPI IP core that will send back the massage received.
I've instantiated the IP cores above in my system designer and connected the Avalon Memory Mapped Master of the JTAG to Avalon Master Bridge IP core to the Avalon Memory Mapped Slave of the SPI IP core.
Now I'm trying to write to the addresses of the SPI ip core using the system console and Jtag to Avalon Memory Mapped Ip core.
For example im trying to assert the SS bit (i have 1 slave device), so im writing the following command in the system console:
master_write_memory $claim_path 0x28 0x01
but the transaction is stuck for 60 seconds, after which the system console is giving up.
Is what i'm trying to do even possible? If so, what am I doing wrong?
Sounds more like a System Console issue. Do the previous commands to create the $claim_path work successfully (finding the service path and opening/claiming the path)?
I'm presuming 0x28 is the address of the register you need to access in the SPI component in Platform Designer. What's the base address set to in Platform Designer?