Megawizard pins do not match datasheets

[Altera_Forum]

I just ran the megawizard plug-in manager to create a interface with my DDR2SDRAM. The example design compiles, but the pins do not match the datasheet. I'm using the Cyclone II EP2C70.  

The ram user guide also says this: IP Toolbench chooses the correct positions, if you are using an Altera board preset.   If i replace the pins assigned by the megawizard with the pins in the datasheet, it does not compile. I get this error:  Error: DDIO Node Error: Following DDIO Output nodes could not be placed by the Fitter   for 288 pins.   Anybody who knows what I'm doing wrong or how I can solve this?   Edit: Do I also have to change the location of the "Logic Array Blocks"? What are these "LAB's", I can't find much information about what they do or how to use them.   Thanks  Steven 

[Altera_Forum]

Hi, 

I use the same board and the same ram and it works fine! Did you edit the "constraint" in the MegaWizard?

[Altera_Forum]

Hi Luca,  

 I did not change the "constraint" in the megawizard. I thought it was set to the right values when selecting the exact type of FPGA, isn't it?  kind regards,  Steven

[Altera_Forum]

Hi Steven, 

I am not sure if the default value in the constraint are right! Try with these (see the attachment). If you want I can also share the all settings of the ddr2!

[Altera_Forum]

Hi Luca,  

 thanks for the quick response. It's the first thing I will check tomorrow morning due to lack of time today. What do you mean by all the settings of the ddr2 ??   Kind regards, Steven

[Altera_Forum]

Hi Steven, 

I am referring to all the values that you have to set in the Wizard! For instance the number of chip selects, the length of the burst, the memory timing etc! Did you set these values or didn't edit?

[Altera_Forum]

The total settings would be nice to know. That way if it doesn't work tomorrow , we can fall back at your settings. 

 Kindest regards, Steven

[Altera_Forum]

Hi Steven 

I copied the total settings from the "Demo project" in Altera's directory, but these settings didn't work at the first time! I made a lot of attemps as long as I found out the "right" settings, almost for my own design! I wrote a vhdl interface to the Altera ddr2 controller to read/write from/to the ddr2 and it works fine. For any doubt write to me! :)