Missing config options in Avalon-ST Multi-Channel Shared Memory FIFO Core

[Broddo]

I'd like to use the multi-channel shared memory FIFO in my design. In the 20.2 version of the Embedded Peripherals IP User Guide, the chapter describing the usage of the core states several options that do not appear to be visible when configuring the core in Platform Designer. Of note, is the missing option to enable/disable packets (packets are enabled by default, I would this option disabled. The guide suggests this is possible). 

Is this deliberate or just a bug? Is there an alternative solution?

I'm running Quartus v20.1 standard ed.

 

 Missing options

[RichardTanSY_Intel · Accepted solution]

You can edit the parameter (USE_PACKETS = 0;) manually at <project directory>/synthesis/submodules/altera_avalon_multi_channel_shared_fifo.v files. 

It is one of the many files generated from the Platform Designer that represents your IP variation.

Furthermore, I have send a request to the engineering team to add "Use Packets" option box in the parameter editor GUI. 

[Broddo]

Changing the parameter manually in altera_avalon_multi_channel_shared_fifo.v does indeed solve the problem.

Thanks for your help with this and thanks for forwarding this to the engineering team too.