Dear all, has anyone encountered the issue described below?
I generate a floating-point number division IP using Quartus 18. Then I used Altera-Modelsim to simulate the results. These are fine and working. Then, I moved all the files to another computer and also with Quartus 18 installed. Then, I run the simulation on this other computer. This time Altera-Modelsim on the second computer returns the error message below
# ** Error: (vsim-3389) C:/Users/Testproject/fp_div14.v(1341): Port 'sclr' not found in the connected module (7th connection).
Does anyone know how to fix this issue or point me to some references?
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