Hello,
I have a VIP + NIOS qsys system that is connected like: TPG->Frame Buffer -> Color Space Converter -> Chroma Resampler -> Clocked Video Output the frame buffer is connected to a dd3 with uniphy interface i am using cyclone V SX Soc Development board and outputting sdi/dvi using another board. my problem is that after some seconds the nios seems to get stuck and i stop getting an image. any idea what is the best way to debug this issue? without the frame buffer the nios doesn't get stuck. Thanks for the help, PencolLink Copied
Hi Pencol,
you could check the Avalon Interface of the UniPhy Controller. In the Diagnostics Tab of the UniPhy settings add EMIF onchip debug option and enable the Efficency Monitor and the Protocol Checker option. With the EMIF toolkit you can verify a potential protocol violation. Use SignalTap to observe the Avalon interface. JensFor more complete information about compiler optimizations, see our Optimization Notice.