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I can not get any responses from the MT25QL512 using the Generic Serial Flash Interface.
I am using a MT25QL512 using a 10Mhz clock and running the following NIOS commands:
//enable chip
IOWR_32DIRECT(INTEL_GENERIC_SERIAL_FLASH_INTERFACE_TOP_0_AVL_CSR_BASE,FLASH_REG_CONTROL,0x01);
unsigned int number_bytes = 4;//5bit
unsigned int dummy_cycles = 0;//4bit
unsigned int opcode = 0x9f;
regvalue = (dummy_cycles << 16) |
(number_bytes << 12) |
(config_flash_cmd_data_type_read << 11) |
(config_flash_cmd_address_bytes_0 << 8) |
opcode ;
IOWR_32DIRECT(INTEL_GENERIC_SERIAL_FLASH_INTERFACE_TOP_0_AVL_CSR_BASE,FLASH_REG_CMD_SETTING,regvalue);
IOWR_32DIRECT(INTEL_GENERIC_SERIAL_FLASH_INTERFACE_TOP_0_AVL_CSR_BASE,FLASH_REG_CMD_CONTROL,1);
printf("\n Write Command : %x \n" , regvalue);
printf("\n ->: %x\n",IORD(INTEL_GENERIC_SERIAL_FLASH_INTERFACE_TOP_0_AVL_CSR_BASE,FLASH_REG_RD_DATA0) );
printf("\n ->: %x\n",IORD(INTEL_GENERIC_SERIAL_FLASH_INTERFACE_TOP_0_AVL_CSR_BASE,FLASH_REG_RD_DATA1) );
Previously , I was successfully in using this chip with the Serial Flash Controller II IP and was able to boot to flash and use it for ASMI.
Other things to note.
This is a single chip with chip select hardwired to on.
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Hi Robert,
Try to set the control register in parameter default setting for GSFI IP. Refer to link below how to set value bit for your device MT25QL512 of control register. By default, this bit is set to 0 (disable the output of the IP).
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-gen-sfi.pdf (p6)
Thanks,
Regards
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