FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
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PCI Express Down trains

Altera_Forum
Honored Contributor II
‎04-28-2010 08:10 PM
843 Views

Hi, 

Is anyone having a problem with the PCI Express link not coming up at the correct width ? We have a x4 link that sometimes comes up as x2 and x1. 

We're using the Hard IP for PEX. 

I'm wondering if anyone else is seeing this issue. 

 

Thanks!
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