FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5881 Discussions

PCI Express Stratix 10 HIP PME_to_ACK / PME_to_turnoff messages

Smarty
Novice
128 Views

Hi all,

I am designing a S10 design with PCIe HIP.

On Cyclone 5 / Arria 10 it was possible to detect the PME_turn_off message with the outport pme_to_sr of the HIP.  Also it was possible to generate the PME_to_ACK message with the inport pme_to_cr of the HIP. These two signals are not available on the latest Stratix 10 PCIe HIP.

The S10 User Guide explains in chapter 6.3.1 how the procedure works to put the device into D3.

Question : Does the User have to detect/generate the message packets described above on the avalon stream interfaces by user logic ? Is this the only way in Stratix 10 ?

Is there any reason why these signals are not present anymore in Stratix 10 ?

 

0 Kudos
1 Solution
SengKok_L_Intel
Moderator
103 Views

Please refer to section 6.1.23.2, it state that the  PME_TO_Ack generation from application layer on the Avalon ST Tx interface. Wherer the pme_turn_off message can be observed from the Avalon-ST RX interface.


Regards -SK


View solution in original post

4 Replies
SengKok_L_Intel
Moderator
112 Views

Hi,


You can refer to the table 47 for the Power Management Interface Signals for Stratix 10 device.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_s10_pcie_avst.pdf


Regards -SK



Smarty
Novice
105 Views

Hi,

I was already aware of this table but it does not address my questions.

Short explanation:

apps_pm_xmt_turnoff : This input is to send the PME_Turn_Off_Message. This is typically required for a rootport because the rootport sends this message to the endpoint. An endpoint needs to detect, if the PM_Turn_Off_Message was received (from the rootport).

If the PM_Turn_Off_Message was received (when in endpoint mode) this requires an output on the PCIe HIP core. Therefore pme_to_sr (Arria 10 / Cyclone 5) is an output.

In Table 47 I cannot find an input to the HIP core that sends the PME_to_ACK Message (in Arria 10 / Cyclone V this port was called pme_to_cr)

Regards

SengKok_L_Intel
Moderator
104 Views

Please refer to section 6.1.23.2, it state that the  PME_TO_Ack generation from application layer on the Avalon ST Tx interface. Wherer the pme_turn_off message can be observed from the Avalon-ST RX interface.


Regards -SK


SengKok_L_Intel
Moderator
85 Views

If further support is needed in this thread, please post a response within 15 days. After 15 days, this thread will be transitioned to community support. The community users will be able to help you with your follow-up questions. 


Reply