PCI Express Stratix 10 HIP PME_to_ACK / PME_to_turnoff messages

[Smarty]

Hi all,

I am designing a S10 design with PCIe HIP.

On Cyclone 5 / Arria 10 it was possible to detect the PME_turn_off message with the outport pme_to_sr of the HIP.  Also it was possible to generate the PME_to_ACK message with the inport pme_to_cr of the HIP. These two signals are not available on the latest Stratix 10 PCIe HIP.

The S10 User Guide explains in chapter 6.3.1 how the procedure works to put the device into D3.

Question : Does the User have to detect/generate the message packets described above on the avalon stream interfaces by user logic ? Is this the only way in Stratix 10 ?

Is there any reason why these signals are not present anymore in Stratix 10 ?

[SengKok_L_Intel]

Hi,

You can refer to the table 47 for the Power Management Interface Signals for Stratix 10 device.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_s10_pcie_avst.pdf

Regards -SK

[Smarty]

Hi,

I was already aware of this table but it does not address my questions.

Short explanation:

apps_pm_xmt_turnoff : This input is to send the PME_Turn_Off_Message. This is typically required for a rootport because the rootport sends this message to the endpoint. An endpoint needs to detect, if the PM_Turn_Off_Message was received (from the rootport).

If the PM_Turn_Off_Message was received (when in endpoint mode) this requires an output on the PCIe HIP core. Therefore pme_to_sr (Arria 10 / Cyclone 5) is an output.

In Table 47 I cannot find an input to the HIP core that sends the PME_to_ACK Message (in Arria 10 / Cyclone V this port was called pme_to_cr)

Regards

[SengKok_L_Intel · Accepted solution]

Please refer to section 6.1.23.2, it state that the  PME_TO_Ack generation from application layer on the Avalon ST Tx interface. Wherer the pme_turn_off message can be observed from the Avalon-ST RX interface.

Regards -SK

[SengKok_L_Intel]

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