FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
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6159 Discussions

PCI Ip Core does not end transaction

Honored Contributor II


I'm having problems with the PCI-IP Core. It gets stuck within a MASTER READ Transaction. 


(-15. cyc) After the Target deasserts trdyn, lm_tsr(8) [dat_xfer - Data transfer successfull] is deasserted. 

(0. cyc)If 14 cycles have passed it asserts lm_tsr(4) [lat_exp - Latency expired] and remains in this state. 

(-1. cyc) Even after asserting lm_lastn and (2. cyc)deasserting lm_rdyn, it does not terminate the transaction. 


I have no idea how I can get it to end the transaction. Has anyone stumbled across this problem yet? 




higher res: https://picload.org/image/pdioldo/stuck_core.png 

I'm using v13.0 Build 232
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