FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5952 Discussions

PCI configuration writes not working

Honored Contributor II

I have a 64-bit PCI master/target that I build in SOPC Builder v11.1 SP2. (We want the Avalon-MM back end, and this is the last version where this is available.) 


I am using the Altera PCI test bench to generate PCI transactions. The first thing that happens is a configuration write of 0x0147 to the Command Register; the transaction appears to happen correctly (the Altera PCI monitor in the test bench indicates no problems). A little later this register is read back, but the contents are still 0x0000. Following that, some memory and I/O reads are attempted, but all are aborted because the PCI does not respond, presumable because it has not been enabled for either I/O or memory reads due to the failed configuration write. 


Has anyone else had this experience? Can anyone suggest a solution for what might be happening here? 


I've attached screen captures of both the command register write and read transactions.
0 Kudos
0 Replies