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Altera_Forum
Honored Contributor I
1,029 Views

PCIe Endpoint rx_st_valid Behavior

I have a question about the Altera PCIe Endpoint (all generations). Assuming rx_st_ready does not drop, when rx_st_valid is raised with rx_st_sop, will it remain raised until rx_st_eop is asserted ? In other words, does the PCIe Endpoint guarantee that when a TLP is received and rx_st_ready remains high that the entire TLP be presented on consecutive cycles without interruption?

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Altera_Forum
Honored Contributor I
32 Views

rx_st_valid and rx-st_ready should remain asserted from the assertion of rx_st_sop until rx_st_eop is deasserted. Otherwise TLP data lose may occured.

Altera_Forum
Honored Contributor I
32 Views

Fyi rx_st_ready Indicates that the Application Layer is ready to accept data. The Application Layer deasserts this signal to throttle the data stream. Attracted waveform describe the behavior of those signals.

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