FPGA Intellectual Property
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PCIe Hard IP Issues With EFI

MZORAN
Beginner
126 Views

I have a fpga design using the Intel Hard IP for PCIe on the Intel Cyclone 10GX development board.  The design works well when using traditional BIOS booting, but I'm seeing a very large number of Avalon MM bus issues when booting with EFI. Reads from fpga registers often return trash in the EFI case. Any ideas what the problem may be?

 

Quartus 22.1 Pro.  I've also tried Quartus 21.4 and have the same issue. In both the traditional BIOS and EFI cases I'm seeing the physical address of the PCIe card being mapped in the 32bit address space of the PC host.  The PC host is an Intel PC running 64 bit Linux.  Same FPGA image in both cases.

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1 Reply
wchiah
Employee
102 Views

Hi,

 

Thanks for reaching.

There is the same question has been answered in another community forum

https://community.intel.com/t5/Intel-Quartus-Prime-Software/Intel-PCIe-Hard-IP-Trouble-With-EFI/td-p...

Hence, I will close this loop as a duplicate. However the community users will continue to help you on this thread. Thank you

 

Regards,

WeiChuan_C_Intel

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