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Which is the bar used for PCIe hard IP in Qsys?
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Whatever BARs you set up.
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Why all the documents says bar0, while the Qsys diagram shows "bar1_0"?
Is "bar1_0" equal to bar0, or is it bar1?
Thank you very much!
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When BAR0 is defined as 64-bit, BAR1 gets 'used up', so bar1_0 really just means a 64-bit BAR0.
Cheers,
Dave
