FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
6024 Discussions

PCIe hard IP in Qsys bar0 or bar1_0?

Altera_Forum
Honored Contributor II
796 Views

Which is the bar used for PCIe hard IP in Qsys? 

 

Why all the documents says bar0, while the Qsys diagram shows "bar1_0"? 

 

Is "bar1_0" equal to bar0, or is it bar1? 

 

Thank you very much!
0 Kudos
1 Reply
Altera_Forum
Honored Contributor II
94 Views

 

--- Quote Start ---  

Which is the bar used for PCIe hard IP in Qsys? 

 

--- Quote End ---  

 

 

Whatever BARs you set up. 

 

 

--- Quote Start ---  

 

Why all the documents says bar0, while the Qsys diagram shows "bar1_0"? 

 

Is "bar1_0" equal to bar0, or is it bar1? 

 

Thank you very much! 

--- Quote End ---  

 

 

When BAR0 is defined as 64-bit, BAR1 gets 'used up', so bar1_0 really just means a 64-bit BAR0. 

 

Cheers, 

Dave
Reply