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PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
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6157 Discussions

PCIe polarity inversion Setting

Honored Contributor II

I am using Altera PCIe x4 Soft IP 9.1 with a 2SGX60E device. As a result of the pcb layout, I have to reverse the polarity of the diffential pairs in both the receiver and the transmitter. 


To invert the reciever polarity, I just hardwired the "pipe8b10binvpolarity" signal in the serdes module to "1111". However, I can't configure the transmitter polarity reversion because the check box of the option, "create 'tx_invpolarity' to allow transmitter polarity inversion", stays gray. I don't know why. 


I even changed other settings to different values, for instance, different devices, hard ip, whatever. But that option just stays gray. 


Anyone who has ever come across this, or succeeded in configuring the transmitter polarity inversion? How did you make that? Thanks.
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3 Replies
Honored Contributor II

There is an optional tx_invpolarity port in the alt2gxb megafunction, which is omitted in the pcie_serdes entity.  


I just edited the pcie_serdes.vhd file and added the port to the alt2gxb component, then hardwired it to "1111" in the instantiation. I changed the "tx_allow_polarity_inversion" string to TRUE as well. 


And there is no warning or error during synthesis.
Honored Contributor II

For PCIe you should not have to worry about the polarity at all. During link initialization all PCIe devices are required to detect the polarity of the incoming signals and invert as needed. The Altera PCIe Soft IP core supports this automatically as delivered. You should not have to edit the core or the SERDES files.

Honored Contributor II

Well, I do see in the pci express base spec that all PCIe receivers are required to to support automatic polarity inversion(Rev1.1,page56). But meanwhile in the stratix ii gx transceiver architecure overview, Altera says: 


"The positive and negative signals of a serial differential link are often  

erroneously swapped during board layout. Solutions like a board re-spin  

or major updates to the PLD logic can prove expensive. The receiver  

polarity inversion feature is provided to correct this situation. An optional rx_invpolarity port is available in all single-width and  

double-width modes except (OIF) CEI PHY to dynamically enable the  

receiver polarity inversion feature..." 


Now that automatic polarity inversion in the link layer is supported, the optional rx_invpolarity port seems unnecessary to most people. What is it designed for? 


Despite of these, I believe that you're right. I don't need to explicitly change the megafunction files.