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PCIe with DMA interface locks RD_DMA_LAST_PTR reaches 127 (7F)

Altera_Forum
Honored Contributor II
861 Views

Hi, 

I have PCIe Hard IP with internal DMA interface (14.0 compiled). I wrote a PC window 7 device driver. When RD_DMA_LAST_PTR reaches 0x7Fsoftare writes 0x7F and the last descriptor ID to the PTR. The DMA completes the operation and status has been set to 1, and interrupt is sent. But it locks up.  

 

Anyone has any idea what is wrong.  

 

Thank you, 

 

David
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4 Replies
Altera_Forum
Honored Contributor II
110 Views

Hi David 

 

Probably you can firstly try use the PCIe Avmm DMA example design and its software Driver that available at below link instead of your own driver. 

http://www.alterawiki.com/wiki/reference_design:_gen3_x8_avmm_256-bit_dma_for_external_ddr3_-_strati...
Altera_Forum
Honored Contributor II
110 Views

Why not you firstly try to use the PCIe Avmm DMA example design and its software Driver available at below link instead of your own driver. 

http://www.alterawiki.com/wiki/reference_design:_gen3_x8_avmm_256-bit_dma_for_external_ddr3_-_strati...
Altera_Forum
Honored Contributor II
110 Views

Hi Skbeh, 

I have Cyclone V only. I have work around with this issue with driver to 128 a time. DMA is fast, it doesn't have any performance hit.  

Thank you,
Altera_Forum
Honored Contributor II
110 Views

If your DMA controller is doing Avalon burst transfers into the Txs port of the PCIe block then the maximum burst size is limited to (I believe) that which will normally generate a single TLP - ie burst 16 giving TLPs of 128 bytes with a 64bit interface. 

The 'simple' dma controller can't be configured to do that for lomng transfers. 

The 'scatter-gather' DMA controller can, but it is a bit like using an atomic bomb to shell a peanut. 

 

OTOH if you are talking about the new DMA interface within the PCIe block itself I can't help.
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