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Hi
I'm using the chinning dma reference design generated by the MegaWizard tool. (Hard IP V 12.1)- Dose someone can help me, how can I measured the latency on the PCIe HIP.
- Dose someone have an experience with this design, I heard that there is a gaps in the DMA, it is right? Can I trusted the this ref or I need to write my own application layer
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