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5982 Discussions

Parallel Flash Loader IP - mapping ports problem

Gyud0
Beginner
255 Views

hey,

I was creating the Parallel Flash Loader IP by Quartus MegaFunction.

I integrated this IP in the Top design file( add the IP's ports, declare the IP, mapping the IP to the Top's port). Then I mapped the ports to the FPGA's I/O and I got problems in Quartus (in the Fitter stage) about multiple pins assignments for these mapping routes. they collides with reserved Altera pins:

 

Error(176310): can't place multiple pins assigned to pin location Pin_E2 (IOPAD_X0_Y36_N7)

Info(176311) : pin flash_nce is assigned to pin location Pin_E2

Info(176311) : pin ~AlLTERA_FLASH_nCE_nCSO~ is assigned to pin location Pin_E2

 

 

 

 

 

this is the component ports:

 

component parallel_flash_loader is

port (

pfl_flash_access_granted: in std_logic;

pfl_nreset:in std_logic;

flash_addr: out std_logic_vector(22 downto 0);

flash_data:inout std_logic_vector(15 downto 0);

flash_nce: out std_logic;

flash_noe: out std_logic;

flash_nwe:out std_logic;

pfl_flash_access_request:out std_logic

);

end component parallel_flash_loader ;

 

 

 

I need some help here, thank you

 

 

 

0 Kudos
8 Replies
NurAiman_M_Intel
Employee
197 Views

Hi,

 

Thank you for contacting Intel community.

 

Have you refer to Intel PFL guideline below:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_pfl.pdf

 

Let me know if you need further information.

 

Regards,

Aiman

Gyud0
Beginner
197 Views

Hey,

in this guide I see that the PFL not support active-parallel configuration (only passive-serial and fast-passive-parrallel). Can you suggest me a way to configure the FPGA by Active parallel?

THX,

NurAiman_M_Intel
Employee
197 Views

Hi,

 

Active parallel only support old FPGA device and do not support new FPGA. May i know which FPGA device family that you are using?

 

Thank you.

 

Regards,

Aiman

Gyud0
Beginner
197 Views
NurAiman_M_Intel
Employee
197 Views

Hi,

By active parallel, do you mean Active Serial?

 

Regards,

Aiman

Gyud0
Beginner
197 Views

Active parallel means that I want the flash program several FPGA's (2 in my case) in the same time.

NurAiman_M_Intel
Employee
197 Views
NurAiman_M_Intel
Employee
197 Views

Hi,

 

I believe my previous response has address your question since there is no update on this case. Hence i will proceed to close this case, but please noted you can re-open this case within 10 days or create a new case if you need further information.

 

Thank you.

 

Regards,

Aiman

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