Proper way to add/initialize RAM in FPGA project?

[DidYouCatchThat]

Hi all,

I'm trying to figure out the proper way to add memory to an ARM Cortex processor project. 

The goal here is to be able to toss in a few NOP instructions into memory, have the Cortex run those commands, and track the logic to make sure everything is working as it should be. I've tried to look up some manuals/tutorials but they're either very vague or seem to be outdated. 

What I've done so far is access the IP catalog, create a .qip for a SDRAM controller, and added that to my project. The issue is that the project no longer fits into my DE10 Lite which makes sense as I just barely had enough pins for the processor itself and now the RAM module asks for dozens more. 

Basically, I'd like to know if this is the best and/or only way to use the built-in FPGA ram or if there's any alternatives I can look at. I have the option of trying to further trim non-essential signals from the processor but want to know if there are other options before going that route. 

Thanks in advance for any help/advice! 

P.S. I'm a student still so please forgive any ignorance. 

[ak6dn]

DE10-LITE uses a MAX10 device, it is just an FPGA, no embedded processor.

Ref:  https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=234&No=1021&PartNo=1#contents

So your question re: ARM/CORTEX makes no sense.

Are you using a compiled NIOSII processor?

Or is your board something else that has a SOC ARM FPGA?

As an aside, if you are using INTERNAL FPGA block ram, that can be initialized in the design file via .mif memory initialization files.
For example, you can build ROM devices within the FPGA logic structure that use this means.

External memory, tho, like SDRAM or SRAM, cannot be initialized like this. It is up to your code to initialize it by some means.

[DidYouCatchThat]

Apologies for being unclear. 

I have the verilog files for the ARM Cortex M0 as part of their educational program. It compiles and I am able to program it into the DE10-Lite. This was phase one of my research project. 

I'm now trying to see if the Cortex actually works by connecting it to the internal FPGA ram in order to run a simple program and track the logic. This would be phase two of the project. 

I'll look deeper into the .mif files. Is my initial approach of using the IP catalog to add a RAM controller into my design the right direction? 

[ak6dn · Accepted solution]

Yes, an IP block that instantiates the ALTSYNCRAM single port RAM module should work.

This will build an INTERNAL FPGA memory using the device block RAM.

You can initialize it with a .mif file when you instantiate the module.

If you are trying to use EXTERNAL memory (like SDRAM, or SRAM) that cannot be initialized thru this means.

[tventing]

Hi,

Agreed with @ak6dn. DE10-LITE does not have embedded processor. Do you mind to attach your .qar file for us to take a look?

Thanks.

[DidYouCatchThat]

I understand how this would be helpful but, with the use of ARM IP in my project, I'm not allowed to share the project files. 

[tventing]

Hi,

Since you couldn't provide the project file, can you try the suggestion from @ak6dn? Let us know if you can successfully add the RAM into your design.

Thanks.

[tventing]

Hi,

I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

Best Regards,

Ven Ting

p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 9/10 survey.