- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Gentlemen,
I have a DE2-70 board with a std RS232 port. I was wondering if I could modify the example Media Computer using QSys to add 2 additional RS-232 ports using the expansion connector at 3.3V TTL. One of these ports would be bi-directional to a 4D Systems graphics card and the other would be incoming data from a ZigBee wireless card. The questions are: Does anyone see a potential conflict/problem, assuming that I can effectively handle the programming :rolleyes:? Can I simply assign additional address space after the RS-232-0 that already exists? After reading all of the tutorials/ literature I can find I cannot figure out how the "address space" is assigned. I suspect it has to do with the Avalon MM bridges, but again I am not sure and would appreciate any comments. Regards, GeofLink Copied
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
First of all remind that RS232 refers to the physical layer, not the Qsys component which actually is a generic UART. If you really need RS232 you can't use directly the LVTTL signals on expansion connector, but you need a RS232 transceiver in order to translate voltage levels.
Besides this, you can add as many serial ports you want, provided your fpga has enough resources and your Nios can handle the increased code size and load. Qsys will take care of address space, by placing each new component at a different base address and avoiding overlaps. So you won't have conflicts unless you manually change base addresses. Basic UART component has only a bunch of registers (IIRC address range is 8), so you definitely won't fill the memory address space.- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hardware FIFO might use up a significant amount of internal memory.
It really ought to be possible to use a single M9K block to give 16 UARTS 32 byes of tx and rx fifo (if my maths is correct).- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Thanks to both Cris72 and dsl for your answers. I believe that answers my questions nicely. On the two additional ports I definitely want TTL levels and not RS-232 levels. My error in terminology. The UART is what I am looking for. I will not need to add FIFO to the monodirectional ports, but will have it for the bidirectional port, so memory will nto be an issue. This is going to control a model railroad and use AI to do routing and prevent crashes.
Regards, Geof- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page