The device I am using is the Arria II GX 95. I configured four serdes with the mega wizard as a XAUI interface.Looping back the transmit serdes out to the recieive serdes in, the xaui link operates perfectly. Note, the reference clock to the serdes tx and rx is the same. If I then try and connect the serdes tx out to the serdes rx in on another card, the link goes out of sync. Note, the reference clock to the serdes tx and to the serdes rx of the other card will be +/-50 ppm different since the reference clocks on different cards. I have narrowed the problem down to the rate compensation fifo in the rx serdes PCS block not making adjustments to the /R/ code groups through adds or deletes. So, I'm trying to figure out why my rate compensation fifo is not working in the receive PCS block of the GXB transceiver and hoping someone may have had some experience with this. Here is some additional information…. Based on the Arria handbook, the rate match operation should begin after rx_syncstatus and rx_channelaligned are asserted. I have verified that rx_syncstatus goes to an 0xff and rx_channelaligned goes to a 1 but the rate match fifos just sit flat lined at 0. Also, I verified that I have enough XGMII IPG idles (0x07s) after the end of frame (0xFD) such that the XAUI mapping state machine on the transmit side can insert enough PCS skip code groups /R/ so the reciever can remove them at the other end of the link if needed for timing justification. I set up a trigger in signal tap to capture if there is any transitions on "rx_rmfifodatadeleted" or "rx_rmfifodatainserted" or "rx_rmfifoempty" or "rx_rmfifofull" and no matter what I do, such as pull the fiber, they stay at zero. Any help or feedback in this matter would be greatly appreciated.
Hi,Did you manage to solve this problem? I have similar problem now on Arria 10 GX. This an old thread but am hoping that you are able to share your solution. Thank you. Best regards, Sanjay