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turncat and rounding on the accuracy of the filter output?
designing filter with Fpga, there are two output modes, turncut and rounding. What effect on accuracy on Both methods have? Is there any way to minimize errors in the output? ? In addition, the Internet, said the biggest interception of errors, will bring the DC noise, does is correct? and which book has detailed studies about this? Thank you! ! ! 截取和舍入对滤波器输出精度影响? fpga 设计滤波器,输出方式一般有两种, 截取和舍入。这两种方式对精度有什么影响?有什么方法可以使 输出的误差最小?? 另外,网上说 截取误差最大,会带来直流噪声,请问 是否正确,那本书上有详细论证, 谢谢大家!!!Link Copied
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truncating will give your output signal a DC bias. rounding will take more logic and possibly degrade fmax. for a more detailed analysis you should run a simulation
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Adding further details:
Truncation leads to noise(truncation noise) and dc bias. Noise is worst with direct truncation(no rounding) and results from random error of up to 1 LSB. It is similar to quantisation noise concept when sampling analogue signals and so its distribution is dependent on signal values probabilty. DC bias is negative due to 2's complement and is worst in direct truncation but also occurs in "nearest" below but here it is positive and dependant on probabilty of midvalues (ties) which is highest when discarding only one bit and gets less and less if discarding more bits. There are 4 examples of truncation algorithms below: (1) convergent : round to nearest even. gives unbiased rounding, commonly used in hardware. (2) nearest : simple, leads to dc bias, common in hardware. (3) round : ideal, no dc bias, minimum noise but method 1 more easily implementable in hardware (4) truncate only, dc bias and noise
for midpoint values case (ties)
Convergent nearest round trunc
-7/2 -3.5 -4 -3 -4 -4
-5/2 -2.5 -2 -2 -3 -3
-3/2 -1.5 -2 -1 -2 -2
-0.5 0 0 -1 n/a
0.5 0 1 1 n/a
3/2 1.5 2 2 2 1
5/2 2.5 2 3 3 2
7/2 3.5 4 4 4 3
The above table represents worst case i.e. one bit discarding and midpoint values(ties). For non ties, both nearest and convergent are equivalent to round Finally, note that say 4.5 is as close to 5 as it is to 4 and so the notion that it must 5 is not exactly solid fact except at school.
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http://www.ovro.caltech.edu/~dwh/correlator/pdf/esc-100paper_hawkins.pdf (http://www.ovro.caltech.edu/%7edwh/correlator/pdf/esc-100paper_hawkins.pdf)
http://www.ovro.caltech.edu/~dwh/correlator/pdf/esc-100slides_hawkins.pdf (http://www.ovro.caltech.edu/%7edwh/correlator/pdf/esc-100slides_hawkins.pdf) Look at p40 and p41 of the slides for examples of truncation noise and the different rounding methods available in MATLAB. The figures show the bias involved in all methods; and that convergent is the rounding method to select. Cheers, Dave- Mark as New
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Hi Dave,
Interesting work and slides. I have been through dsp projects with/without rounding. The notion of dc unbiased version is relatively new. In most cases I had to please the rf engineer by removing a tiny speckle of dc in the spectrum centred on carrier frequency. I am however not clear about round() having positive/negative dc as in your slide. If you look at my table above then there is no way I can imagine dc bias as values are symmetrical around zero. However, I do have some doubts about why the stress has moved to convergent case. Any clarification appreciated. Kaz- Mark as New
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Hi Kaz,
--- Quote Start --- I have been through dsp projects with/without rounding. The notion of dc unbiased version is relatively new. In most cases I had to please the rf engineer by removing a tiny speckle of dc in the spectrum centred on carrier frequency. --- Quote End --- It ends up being important if you do a lot of complex-valued baseband processing, since the quantization noise spike shown in the slides shows up the in 'middle' of your band. If you were only processed real-valued signals, then the DC channel is probably discarded anyway, so its not as critical. --- Quote Start --- I am however not clear about round() having positive/negative dc as in your slide. If you look at my table above then there is no way I can imagine dc bias as values are symmetrical around zero. However, I do have some doubts about why the stress has moved to convergent case. Any clarification appreciated. --- Quote End --- round() is interesting isn't it. There is no bias if you take all the data and perform a 'mean' on it, but you can see from the figure in the slide that the positive values of the signal have a slight positive bias, while the negative have a slight negative bias, due to the rounding of 0.5 values to the next whole value in magnitude, i.e., 2.5 rounds to 3, and -2.5 rounds to -3. Though, I'm not sure how you'd see this effect in practice. The convergent rounding operation is pretty simple to implement in VHDL, see the attached. Since its so simple, I just 'use it' :) Cheers, Dave- Mark as New
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Thanks Dave, very clear and I can assume therefore that for a signal with random values on both sides of zero the issue of dc bias is absorbed and the two algorithms become equivalent.
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--- Quote Start --- I can assume therefore that for a signal with random values on both sides of zero the issue of dc bias is absorbed and the two algorithms become equivalent. --- Quote End --- They're never quite the same, since the average of the positive values and the average of the negative values would be different for the two rounding methods. As to how you'd show that has an effect on signals, lets see if I can think of a scheme where it would have an effect ... Ah, I have one ... Consider the power in a series of random numbers rounded using round() versus convergent(). Given samples x[n], the power is an average of x[n]^2, or the square-root of this (if you want RMS). Since round() causes a slight bias in the positive and negative values, you should get a slight bias in the power measurement. So, round() and convergent() would give different power estimates ... but is the difference large enough to matter? It would depend on the variance of your power estimate; if you averaged for long enough (small variance), then yes the difference would matter. Cheers, Dave
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Very good example. In fact I am just doing some work on power and PAR meter modules and certainly you are right, I am sort of dc-biased myself with direct processing of bipolar signals !!
Thanks a lot.- Mark as New
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Hi Kaz,
--- Quote Start --- I am just doing some work on power and PAR meter modules --- Quote End --- Put yourself to sleep reading these then: http://www.ovro.caltech.edu/~dwh/carma_board/digitizer_tests.pdf (http://www.ovro.caltech.edu/%7edwh/carma_board/digitizer_tests.pdf) http://www.ovro.caltech.edu/~dwh/wbsddc/correlator_efficiency.pdf (http://www.ovro.caltech.edu/%7edwh/wbsddc/correlator_efficiency.pdf) --- Quote Start --- I am sort of dc-biased myself with direct processing of bipolar signals !! --- Quote End --- :) Cheers, Dave- Mark as New
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Hi Kaz,
thanks a lot for yuor reply. I still has something unclear about "DC bias "and "Noise". Any clarification appreciated. In your table, how can "DC bias "and "Noise" for the 4 examples of truncation algorithms . Take the truncate algorithms for example, truncate -7/2 -3.5 -4 dc= -4+3.5= -0.5 Noise=??? -5/2 -2.5 -3 dc= -3+2.5= -0.5 Noise=??? -3/2 -1.5 -2 dc= -2+1.5= -0.5 Noise=??? -0.5 n/a0.5 n/a
3/2 1.5 1 dc= 1-1.5= -0.5 Noise=??? 5/2 2.5 2 dc= 2-2.5= -0.5 Noise=??? 7/2 3.5 3 dc= 3-3.5= -0.5 Noise=??? but how "noise" ???
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If you look at Dave's posts after mine, you will see very good description of both noise and dc bias for various truncation algorithms. The case of direct truncation leads to truncation error of up to 1 LSB. Other cases lead to 0.5 LSB error. The actual error power will then depend on probaility issues and can be modelled same as quantisation noise of ADC sampling.
--- Quote Start --- http://www.ovro.caltech.edu/~dwh/correlator/pdf/esc-100paper_hawkins.pdf (http://www.ovro.caltech.edu/%7edwh/correlator/pdf/esc-100paper_hawkins.pdf) http://www.ovro.caltech.edu/~dwh/correlator/pdf/esc-100slides_hawkins.pdf (http://www.ovro.caltech.edu/%7edwh/correlator/pdf/esc-100slides_hawkins.pdf) Look at p40 and p41 of the slides for examples of truncation noise and the different rounding methods available in MATLAB. The figures show the bias involved in all methods; and that convergent is the rounding method to select. --- Quote End ---- Mark as New
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Hi Dave,
thanks for your disguise!!! In my project, the case is that I use the FIR compilier v9.0 to build a filter ,whic output width is 30 bits, but only 10 bits to need。So I choose the “round” output mode, and what different between this mode and the example of convergence you have given? ? ?- Mark as New
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Hi Dave,
thanks for your disguise!!! In my project, the case is that I use the FIR compilier v9.0 to build a filter ,whic output width is 30 bits, but only 10 bits to need。So I choose the “round” output mode, and what different between this mode and the example of convergence you have given? ? ?- Mark as New
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--- Quote Start --- In my project, the case is that I use the FIR compilier v9.0 to build a filter ,whic output width is 30 bits, but only 10 bits to need。So I choose the “round” output mode, and what different between this mode and the example of convergence you have given? --- Quote End --- Re-read the discussion I had with Kaz. If the FIR compiler 'round' option uses the same method as the MATLAB round() function, and you then process the FIR filter output to measure the magnitude or power, then you will get a slight error in your estimate. However, Altera may just generically refer to the operation as 'rounding', but actually implement convergent rounding, or round-to-even. You will need to read the FIR compiler guide to see what it implements. Cheers, Dave

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