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Altera_Forum
Honored Contributor I
1,154 Views

Simulation, UniPHY, Calibration

DDR3 UniPHY. 

 

Can't seem to get Quick or Full calibration working in simulation. 

Any ideas / pointers to how to get calibration to show up in simulation? 

 

 

 

How do I know? MRS[1] never gets writing leveling bit. 

And with or without calibration I always see the wrong write signal timing. 

 

 

 

The reason to try: the timing of the write signals are wrong at the memory interface. 

DQS and DQ seem to occur about 1/3 of a cycle too soon, before 

DQS should based on write CAS latency of 6.
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Altera_Forum
Honored Contributor I
38 Views

Altera_Forum
Honored Contributor I
38 Views

Yep, I have. 

 

I have gone as far as editing the _p0 and _pll0 .sv files in the Qsys-generated project, 

basically adding 

 

define ALTERA_ALT_MEM_IF_PHY_FAST_SIM_MODEL 0 

 

And indeed the simulation says using regular PLL and EMIF instead of fast. 

But nevertheless, it seems like no actual calibration happens.
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