Stratix 10 Native PHY Usage

[HBhat2]

Hi,

I have a system which uses custom interface for communication. The system transmits at 20Gbps with Spread spectrum enabled. Whether I can connect that system to Stratix 10 Transceiver using Native PHY and recover the data properly (Stratix 10 doesn't support Spread spectrum recovery as in data sheet).

Downspread rate ~30KHz , Downspread range is ~0.45%

With regards,

HPB

[Deshi_Intel]

Hi HPB, Are you referring to the support from transceiver data channel pin or refclk pin ? If it's regarding transceiver refclk pin then I can see that Stratix 10 datasheet table 38 and table 49 did mentioned about the support for PCIe refclk pin with spread spectrum modulating clock frequency from 30kHz to 33kHz and Spread spectrum downspread from 0-5%. But we don't have such spec support for transceiver data channel. Thanks. Regards, dlim

[HBhat2]

Hi @DeshiL_Intel​ ,

My concern is on the receiver side (and non-PCIe protocol). If I feed the down spread bit sequence @20Gbps from the external source, whether Stratix 10 CDR can recover the correct data?

With Regards,

HPB

[Deshi_Intel]

Hi HPB, Sorry and understood your concern but as I explained earlier, if this is regarding transceiver data channel then I afraid it's not under Intel supported protocol and hence there won't be any test coverage to tell whether it will works or not. As it's not supported protocol, we can only advise customer to test and verify by themself. Regards, dlim

[HBhat2]

Hi @DeshiL_Intel​ ,

Thanks for your viewpoint.

I was doing feasibility study and In my view, if there is a downspread means there will be little variation in the data rate (x ppm) induced due to the downspread. Stratix 10 Receiver tolerates -1000 to +1000 ppm variation in the incoming data as per the Stratix 10 data sheet. If the difference in ppm after downspread out of (-1000 to 1000ppm) range then I doubt the recovery will be false free.

Correct me if my understanding is wrong regarding Transceiver's receiver ppm threshold.

With Regards,

HPB

[Deshi_Intel]

Hi HPB, Your understanding is correct. If user can control S10 Ltile/Htile CDR incoming refclk ppm below 1000 threshold then it should be safe. CDR should be able to lock Do take note that for S10 Etile the CDR ppm tolerance spec is just 750, not 1000. Thanks. Regards, dlim