FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
6262 Discussions

Stratix iv GX PCIE RootPort Testbench

Altera_Forum
Honored Contributor II
‎11-23-2011 01:12 PM
835 Views

Hi all, 

 

Has anyone already used the qmegawiz to generate the pcie as rootpoint and simulated it ? 

 

I used the qmegawiz with version 10.1 to generate a rootpoint pcie, but I did't see any files related to the testbench of it. For example, there are no files named "<variation_name>_rp_testbench" or "altpcietb_bfm_vc_intf_ast". 

 

Should we need a special qmegawiz to generate the rootpoint pcie simulation ? 

 

Thanks.
0 Kudos

Link Copied

1 Reply
Altera_Forum
Honored Contributor II
‎05-28-2013 12:50 PM
148 Views

have you solved it?

0 Kudos
Copy link
Reply

Community support is provided during standard business hours (Monday to Friday 7AM - 5PM PST). Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.