FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5950 Discussions

TSE IP Core v15.0 Hold Violation Bug

NJack1
Beginner
702 Views

This link: https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/soluti...

states that the v15.0 version of the core had had a bug where a small hold violation may be observed when used on a Cyclone V.

 

I am currently seeing this using v16.1 of the core (and Quartus) with a C8 speed grade Cyclone V.

Does anyone know if the above bug still exists in v16.1 of Quartus?

0 Kudos
1 Reply
KhaiChein_Y_Intel
102 Views

Hi NJack1,

 

Kindly use the workaround suggested in this KDB.

 

Thanks

Reply