1. i want to use TSE for my design.i am using Quartusii version15 on which i found that the Ip core can be accessed in two ways. first one is by adding the IP from IP catalog on the right side of the tool. another method is to use qsys. what is the basic difference between the two? which one should i use since i am new to this tool?2. will TSE fit in max10 FPGA 16K version????
I think either Qsys or IP Catalog to used would be dependent on your target implemention and which environment that you are familiar with. For me, I generally use IP Catalog and then add the module into my RTL since I am not familiar with Qsys.