FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP

TSE SGDMA isr problem

Altera_Forum
Honored Contributor II
1,323 Views

Hello to everybody. 

 

I have CIII 3c120 dev kit with Marvell 88e1111 PHY on it. 

I want to send and receive packets, so i use TSE (mac level). 

 

I wrote software code to transmit packet (it works) and now i try to receive packet. 

 

TSE works with 2 sgdma rx\tx. 

When a packet comes from PC it causes an interreupt and to process it there is alt_avalon_sgdma_register_callback for user application. 

So i registered my isr function in it, but during the debug I can't access it. 

 

I ping 192.168.37.5 and PC sends broadcast packets, the rx led is on when the packet is coming, but in debug mode it doesn't access the isr function. 

 

So, are there any ideas about this problem?
0 Kudos
4 Replies
Altera_Forum
Honored Contributor II
329 Views

Did you do your own hardware design in the FPGA or did you use a ready made design? Are you meeting timing requirements? 

Why did you comment the line "alt_irq_enable_all(sgdma_rx_dev);" ?
0 Kudos
Altera_Forum
Honored Contributor II
329 Views

It's my own design. 

Yes i met timings. 

I commented it because there were no effect of this function.
0 Kudos
Altera_Forum
Honored Contributor II
329 Views

Try to put some signaltap probes on the Avalon stream interface between the MAC and the rx DMA, to see if anything is transferred. It should help you find out if the problem is on the MAC or the DMA side.

0 Kudos
Altera_Forum
Honored Contributor II
329 Views

Hi, 

 

Could you please also send the hello_world.h file?  

 

Thanks, 

Mangesh
0 Kudos
Reply