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Time limited device programming

Altera_Forum
Honored Contributor II
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hello, 

 

i have readed about VIP Core and more. what does mean "Time limited device programming"? what can i do to realise Time non limited device programming? 

 

thank you
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Altera_Forum
Honored Contributor II
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The only use of time limited cores is for you to test and have flavour of the core free of charge and for the vendor to make money once you decide to buy the proper nontime limited core. 

 

It is a risky core, if for example it is left running in an aeroplane only to stop over the atlantic... 

apparently they use a counter to measure time on your clk once you powerup 

then terminate the function at the target count but who knows it might be buggy and work for good
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Altera_Forum
Honored Contributor II
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Non time limited device programming can be achieved only if u buy the cores used in your program.  

Else for Non time-limited evaluation of free cores, leave the jtag programming cable or USB blaster cable connected [Do not disconnect] after programming in a FPGA board.
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