Triple Speed Ethernet IP Example Design Agilex 5

[Nicole04]

Hi,

I tried compiling the Triple Speed Ethernet IP Example Design for the Agilex 5 E-Series device. The compilation fails with the errors shown in the attached image.

I was able to compile other IP Cores for this device without any errors.

Kind regards,

Nicole

[ZiYing_Intel]

Hi Nicole,

May I know the OPN number of the device that you use?

Best regards,

Zying

[Nicole04]

Hi Zying,

I was using the A5ED065BB32AI4S, but for testing purposes I can use a different 32x32mm package A5ED065 device. 

I was able to compile the IP Core when using a variation without the GTS Transceiver. 

Kind regards,

Nicole

[ZiYing_Intel]

Hi Nicole,

I tried compile the Triple Speed Ethernet example design and it was compilation fail from my end. Please do allow me have some time to investigate this issue with engineering team.

Best regards,

zying

[ZiYing_Intel]

Hi Nicole,

The Triple Speed Ethernet example design was compilation successfully from my side. I have attached the .qar file and please do let me know if this not working for you.

Best regards,

zying

[ZiYing_Intel]

Hi,

Since no hear any feedback from you, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread.

Best regards,

zying