Hello,
I try to run the Triple Speed Ethernet MAC IP with IEEE 1588 support on a Cyclone V GX device.
My configuration is:
- Core Variation: "10/100/1000-Mbps MAC with 1000BASE-X/SGMII PCS"
- Uncheck "Use Internal FIFO"
- Transceiver Type: GXB
- Enable Timestamping
Problem: I need to check "Enable SGMII bridge" to be able to check "Enable Timestamping"
Why is the SGMII bridge mandatory for IEEE 1588?
On my board, the FPGA will be connected to an SGMII PHY with only 1000Mbps data rate. 10Mbps and 100 Mbps won't be used since thys PHY is connected to an onboard GbE switch.
Thanks for confirmation
