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Hello all,
I am currently trying to understand the Triple Speed Ethernet (TSE) IP for an application on the Cyclone V FPGA Board. Through my search, I couldn't find a design example which is a bare metal firmware / without an operating system.
Is there a already developed design example for the same / similar FPGA family which i can use to understand the IP and intergrate into the Cyclone V ? I am using a Cyclone V FPGA with a NIOS II system.
Also, what IP/networking stacks supports the TSE Ethernet IP?
If more information is required from my side, please let me know.
Thank you!
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Hi Bhargav12,
Thanks for submitting the issue. Please do let me have some time to look into your issue and I will get back to you with findings.
Best regards,
Zi Ying
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Hi Bhargav12,
Currently Intel do not provide the example design that can share with public. But you can find the similiar example design through link below https://www.rocketboards.org/foswiki/Main/WebHome .
Best regards,
Zi Ying
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Hi,
Since I have addressed your question and no hear any feedback from you, I am now close the case. If you have any question after the case closed, please do feel free to submit another issue.
Best regards,
Zi Ying

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