Using Intel PCIe User APP example

[LastHorizon0711]

Hi there, 

I have created a PCIe interface on a Cyclone V device - simulation only at this point in time as I don't have the appropriate development kit! 

I have simulated the system using the generated BFM example and User APP logic. 

Now I wish to drill down into the example User APP logic as a basis for doing my custom stuff.

If I am right, in the example file (altpcierd_example_app_chaining.v) there is a module called "altpcierd_tx_req_reg" which is set up to just assign the inputs to the outputs. If I edit this behaviour (i.e. insert a register stage) then I break the chaining_dma example from the BFM host. Is this actually an appropriate place to start experimentation and extracting the raw data that has been transported to the FPGA over the PCIe interface? Or is this too example dependant? 

Any help in further understanding this would be greatly appreciated! 

Many thanks 

Alex 

[Wincent_Altera]

Hi,

Appreciate it if you can share the "example User APP logic" so that I understand more about the problem that you facing?

Regards,

WeiChuan_C_Intel

[Wincent_Altera]

Hi,

We do not receive any response from you to the previous question that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you

Regards,

WeiChuan_C_Intel

[LastHorizon0711]

Please find the source files that constitute the example user app logic I am currently working with. 

Hopefully that helps 

Many thanks 
Alex 

[Wincent_Altera]

Hi,

In Cyclone V Hard IP for PCIe user guide User guide Chapter 17

https://www.intel.com/content/dam/support/cn/zh/programmable/support-resources/bulk-container/pdfs/literature/ug/ug-c5-pcie.pdf

Provide the RootPort/endpoint design example including the test driver module.

You can follow the steps in these chapters to run the simulation.

Regards,

WeiChuan_C_Intel

[Wincent_Altera]

Hi,

I wish to follow up with you on this case. Do you still have further inquiries on this issue? I will remain this loop open for 3 days.

If we do not receive any response from you to the previous answer that I have provided.

This thread will be transitioned to community support.

If you have a new question, feel free to open a new thread to get support from Intel experts.

Otherwise, the community users will continue to help you on this thread. Thank you

Best regards,

WeiChuan_C_Intel