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I'm trying to use the Clocked Video Output IP with the SOPC builder
I need to output a 1920x1080i50hz video with separate sync signals. To create the separate sync signals the wizard needs the following parameters. I'm using the Test Pattern Generator (from Altera) to feed the clocked video output. I configured it to generate a 1920x1080 pixels interlaced colorbar (F0 synchronized). The colorspace is YCbCr with 10 bits per color space using 4:2:2 sampling. The pixel clock is 74.25MHZ. The clocked video output is configured like this: Image Width: 1920 pixels Image Height: 1080 lines Bits per pixel per color plane: 10 Number of color planes: 2 Color plane transmission format: parallel Interlaced video checked Pixel fifo size: 4000 pixels (at least) fifo level to start output = 1919 Sync signals: on separate wires The rest of the settings as follows: active picture wdith = 1920 active picture Height = 1080 active picture line = 21 horizontal sync = 44 f1 horizontal fp = 535 f1 horizontal bp = 141 f1 vertical sync = 5 f1 vertical fp = 4 f1 vertical bp = 36 f0 vertical sync = 5 f0 vertical fp = 4 f0 vertical bp = 36 f0 rising edge line = 564 f0 falling edge line = 1 vertical blanking rising edge line = 561 The synchronization signals settings are what I need to know Using embedded sync signals the video was output perfectly, but I really need the external sync signals to drive other components in the system. I've tried different combinations (which I thought were OK) but couldn't get the video correctly sync'd. Anyone knows the correct values? I am using Quartus verion 9.1. Thanks in advance, JIMMYLink Copied
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Hi Jimmy,
did you get a solution for your Problem? I have the same Problem, I need seperate wires and SDI-Signals 1920x1080. Can you help me? Anja
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