On the Altera website, I only found the Verilog Version of the PCI Express High Performance Reference Design, anyone have the VHDL version? Please do me a favor to send it to email@example.com. Thanks very much!
step 1: Create Project.step 2: Add vhdl Pci Express component pcie using Mega-Wizard. step 3: Look at folder name_project/pcie_examples/chaining_dma/ step 4: Set pcie_example_chaining_top.vhd - top-entity file. It is VHDL of the PCI Express High Performance Reference Design.
Hi. I wonder if someone can provide more details regarding the solution offered here bywekolos. It's bee a few years apparently. I am trying to convert the find the pcie high performance reference design (from document an456 ) in VHDL instead of verilog. I kind of tried to follow the steps offered and I think I might have been able to generate an example design in vhdl from the tool, but the top layer that matches the eval board doesn't exist. Specifically I'm referring to top_hw.v in the reference design, or this pcie_example_chaining_top.vhd that wekolos above is talking about. it is just no where to be found. thanks