FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5881 Discussions

VIP SCALER II output data all zero

Altera_Forum
Honored Contributor II
828 Views

When I run the SCALER II with no control port, I use the bicubic way. And I have no .mif file 

The control packet can output correctly, but the video packet output is all zero. 

The valid, ready, sop and eop are output correctly. 

My datapath is as follows: deinterlace II --> CLIP --> SCALER II --> FRAME BUFFER 

Can anyone help me to solve this problem, thanks
0 Kudos
2 Replies
Altera_Forum
Honored Contributor II
87 Views

Hi Jiangsuren,  

 

You will get the zero video packet out in the simulation could be due to the *mif file is missing.  

Could you please copy the coefficient .*mif file to your simulation directory from the following folder?  

 

\synthesis\submodules\src_hdl 

 

Please also check if there is any warning or error message from the simulation.  

Best Regards, 

Terence 

 

(This message was posted on behalf of Intel Corporation)
Altera_Forum
Honored Contributor II
87 Views

Thanks, it can run now

Reply