FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
6359 Discussions

VIP-Suite: Clocked_Video_In-Registers

Altera_Forum
Honored Contributor II
‎03-29-2012 12:34 PM
889 Views

Hi, 

I'm using the VIP-Suite on Bitec's CycloneIII-Video-Dev.-Kit. and the Bitec HSMC DVI daughter card. Video source is a conventional PC with a resolution of 1920x1080p@60Hz. Although the input (and output) of the video is running without problems, reading the registers of the clocked video input is non-satisfying. E.g. reading the resolution of the video-source shows ever-changing values. Sometimes - it depends on analysis and fitter - it works, but not often. Who can help? 

 

Best Regards 

 

Mark
0 Kudos

Link Copied

1 Reply
Altera_Forum
Honored Contributor II
‎03-30-2012 02:13 PM
192 Views

Hi,  

 

As far as I have worked, the resolution register will display the value which is actually coming from the HW board irrespective of what is set by software. If it is fluctuating may be the resolution on the HW is changing dynamically. I tested that by setting different resolution in SW and use different resolution in HW. And the actual value read in the register was that from the HW. 

 

Also there is a sample SW example to read the registers if it can help 

 

Regards 

Sneha
0 Kudos
Copy link
Reply

Community support is provided during standard business hours (Monday to Friday 7AM - 5PM PST). Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.