after THe .sof file is downloaded,the DDR4 IP works,why?

[pku_cfp]

After powering on the circuit board with DDR4 and FPGA, it appears the DDR4 IP does not finish calibratin stage. The three signals of the local_reset_done, local_cal_success,local_cal_fail are all low.

But after downloading the .sof file, the miracle happed: DDR4 become working well:the local_reset_done and local_cal_success are high while local_cal_fail is low!

why ? why ? why ? How to resolve this issue?

By the way,in my rtl:local_reset_req = ~button_reset_n || device_ninit_done;

[sstrell]

Are you saying that your board (custom board?) is supposed to be programming the FPGA automatically on power-up?

If not, then yes, you have to program the device manually before the EMIF will work.

[AdzimZM_Intel]

Hi,

Usually the DDR will work after programming the board.

The FPGA required an interface to interact with the DDR.

Regards,

Adzim

[AdzimZM_Intel]

As we do not receive any response from you on the previous reply that we have provided, I now transition this thread to community support. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.