07-19-2011 10:21 AM
Hello All,I have the algebraic loop error problem in the loop consisting of multiplexers, adders and multipliers. The depth of the pipeline is 0 in all the applicable cases. but when i change the depth of the pipeline to 1 in one of the adders, the error disappears but the result would not match the expected values. I have tried all combinations of pipelined adder block with parallel adder subtractor block and product block with multiplier block. I have also tried using the ALTBUS blocks after every adder and multiplier block, but was of no use. hence, request for help so that i can fix this problem. Best Regards, Anitha
07-19-2011 10:44 AM
Can you add some more detail about your design?The schematic? A snipset of the code? I know that combinatorial loop are not implementable in digital logic. Is this the problem you're facing?
07-20-2011 02:02 AM
https://www.alteraforum.com/forum/attachment.php?attachmentid=4494 The M file (transf2_test_data.m) is the script with the input values and the MDL (transf2_com_altera.mdl) is the model in discussion. Thanks in advance.