FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
6060 Discussions

altera_dma driver for PCIe

Altera_Forum
Honored Contributor II
9,933 Views

Hi everyone, i'm using an Arria V starter kit for PCIe application and i used the reference design posted in altera wiki. The application software reported success in one PC but not in other with different features. The driver code is installed in two with success but in one, user application reported timeout for read, write and simultaneous RW. Had anyone has the same problem? Have anyone some suggestion about what can i do to try solve this problem?

0 Kudos
33 Replies
Altera_Forum
Honored Contributor II
325 Views

Thank you very much for reply, Below my log.  

 

I am doing the following step  

 

./run  

start DMA 1  

Loop 8  

 

My Problem I don't get read passed /write passed 1 , with very low throughput less 0.1G  

 

 

 

[ 1316.143821] Altera DMA: altera_dma_remove(), __DATE__ __TIME__  

[ 1316.161570] Altera DMA: altera_dma_init(), __DATE__ __TIME__  

[ 1316.161596] Altera DMA 0000:02:00.0: pci_enable_device() successful 

[ 1316.161643] Altera DMA 0000:02:00.0: pci_enable_msi() successful 

[ 1316.161650] Altera DMA 0000:02:00.0: using a 64-bit irq mask 

[ 1316.161651] Altera DMA 0000:02:00.0: irq pin: 1 

[ 1316.161652] Altera DMA 0000:02:00.0: irq line: 10 

[ 1316.161653] Altera DMA 0000:02:00.0: irq: 43 

[ 1316.161654] Altera DMA 0000:02:00.0: request irq: 10 

[ 1316.161655] Altera DMA 0000:02:00.0: BAR[0] 0xd2208000-0xd22081ff flags 0x0014220c, length 512 

[ 1316.161657] Altera DMA 0000:02:00.0: BAR[1] 0x00000000-0x00000000 flags 0x00000000, length 0 

[ 1316.161658] Altera DMA 0000:02:00.0: BAR[2] 0x00000000-0x00000000 flags 0x00000000, length 0 

[ 1316.161659] Altera DMA 0000:02:00.0: BAR[3] 0x00000000-0x00000000 flags 0x00000000, length 0 

[ 1316.161660] Altera DMA 0000:02:00.0: BAR[4] 0xd2200000-0xd2207fff flags 0x0014220c, length 32768 

[ 1316.161661] Altera DMA 0000:02:00.0: BAR[5] 0x00000000-0x00000000 flags 0x00000000, length 0 

[ 1316.161672] Altera DMA 0000:02:00.0: BAR[0] mapped to 0xffffc90000fe2000, length 512 

[ 1316.161677] Altera DMA 0000:02:00.0: BAR[4] mapped to 0xffffc90001540000, length 32768 

[ 1318.795184] Read DMA times out 

[ 1318.795186] DWORD = 00000200 

[ 1318.795187] Desc = 00000080 

[ 1318.992722] Write DMA times out 

[ 1318.992722] DWORD = 00000200 

[ 1318.992723] Desc = 00000080 

[ 1319.211383] Simultaneous DMA times out 

[ 1319.211383] DWORD = 00000200 

[ 1319.211384] Desc = 00000080 

[ 1323.836579] Read DMA times out 

[ 1323.836581] DWORD = 00000200 

[ 1323.836581] Desc = 00000080 

[ 1324.033586] Write DMA times out 

[ 1324.033586] DWORD = 00000200 

[ 1324.033587] Desc = 00000080 

[ 1324.251871] Simultaneous DMA times out 

[ 1324.251871] DWORD = 00000200 

[ 1324.251872] Desc = 00000080 

[ 1332.790695] Read DMA times out 

[ 1332.790697] DWORD = 00000200 

[ 1332.790698] Desc = 00000080 

[ 1332.988569] Write DMA times out 

[ 1332.988570] DWORD = 00000200 

[ 1332.988571] Desc = 00000080 

[ 1333.207756] Simultaneous DMA times out 

[ 1333.207757] DWORD = 00000200
Altera_Forum
Honored Contributor II
325 Views

TO_BE_DONE

Altera_Forum
Honored Contributor II
325 Views

Hello,  

 

I don't know if anyone has the same issue, PCIe linux driver can see PCIe Gen1, however it can't see Gen2 and Gen3 (when I run lspci -vvv, I get unknown header 7f)  

To get stratix v PCIe Gen3 working is so important to my research, so I would appreciate any help! 

 

Rasha
Altera_Forum
Honored Contributor II
325 Views

Hello,  

 

I don't know if you had same issue like mine, PCIe linux driver can see PCIe Gen1, however it can't see Gen2 and Gen3 (when I run lspci -vvv, I get unknown header 7f).  

Is yours working on Gen3? 

Also, when I use Gen1, I still don't get read /write passed working, although Bar0 and Bar4 mapped correctly!  

 

To get stratix v PCIe Gen3 working is so important to my research, so I would appreciate any help!
Altera_Forum
Honored Contributor II
325 Views

Hi, talking about reference design for Arria V, i solved the issue modifying PCIe memory address space from 32(default in reference design) to 64, maybe will work for you also. You just need call Qsys and there, click in avmmdma_pcie instance. In the configuration window you will see the memory address space parameter.

Altera_Forum
Honored Contributor II
325 Views

This thread totally slipped my mind. Sincere apology for the super delayed reply. But also I have been pretty hesitant to post my solution because I think my problem was just caused by my ignorance about how PCIe device and the IP works.  

 

But, anyways, there were two reasons why it didn't work for me: 

(1) I was using a PCIe extension cable to connect the device 

(2) I didn't successfully recompile the reference design with the version of Quartus I use 

 

After I plug the FPGA directly to the PCIe slot, regenerate (update) the Qsys file, and successfully recompile the entire design with the new version of Quartus, I was able to run the reference design with the speed of 5.X GB/s or up. 

 

Hope this helps.
Altera_Forum
Honored Contributor II
325 Views

Thanks for your reply. I don't think it helps since my memory address is already 64. Also, I am using DE5 net Stratix V

Altera_Forum
Honored Contributor II
325 Views

Thanks for your reply. Are you using stratix V DE5 net ??

Altera_Forum
Honored Contributor II
325 Views

No, i used an Arria V Starter Kit.

Altera_Forum
Honored Contributor II
325 Views

The low throughput numbers that everyone is seeing in DMA module is due to DMA timeout happening. 

DMA timeout is occurring because the Descriptor controller FIFO addresses for Read and Write in altera_dma.h do not  

match the values in FPGA (reported in QSYS).  

The base addresses of wr_dts_slave and rd_dts_slave in QSYS and the defines WR_CTRL_BUF_BASE_* and RD_CTRL_BUF_BASE_* in altera_dma.h should match. 

 

So basically if your addresses in FPGA are: 

rd_dts_slave - 0x1_0000 (Base) 

wr_dts_slave - 0x1_2000 (Base) 

 

Then altera_dma.h should define:# define RD_CTRL_BUF_BASE_LOW 0x00010000# define RD_CTRL_BUF_BASE_HI 0x00000000# define WR_CTRL_BUF_BASE_LOW 0x00012000# define WR_CTRL_BUF_BASE_HI 0x00000000
Jose_G_Intel3
Employee
325 Views

Hello All,

 

  1. I'm having the same issue. Has anyone found a solution for the "Couldn't open the device." error?.
HungLam
Beginner
325 Views

It was so bad when Altera merged to Intel, so many reference links broken. And reference design was so weird, it has not been working as stated in Application Note.

小孟000
Beginner
325 Views

My c10gx develepoment kit has the same problem:

when lspci : Non-VGA unclassified device: Altera Corporation Device e003 (rev 01)

when ./run : Couldn't open the device

my linux version is ubuntu 16.04, 64bit,

Is this driver for linux-64 or 32?

how can I make it ok? I refferd to app AN829,but it looks like not work.

Best Regards!!​

Reply