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Altera_Forum
Honored Contributor I
695 Views

altserial_flash_loader shared access

I've been trying to get both the JTAG indirect flash programming and a user design utilizing the SPI interface to work. Both cores work independently. I am feeding dclk_in with a 20MHz output of an altera PLL and tie noe_in to '0'. 

 

If enable_shared_access="ON" and I tie asmi_access_granted to '1', then I can program the flash from the quartus GUI over JTAG correctly. 

 

If enable_shared_access="ON" and I tie asmi_access_granted to '0', then my core is able to correctly access the flash via dclkin, noe, data0out, and sdoin. 

 

However, when I try to arbitrate access to the device using asmi_access_request, something goes horribly wrong. My core continues to work, but the moment the JTAG programmer ties to access the interface, it breaks. I'd signal tap it, but obviously, the JTAG is busy at this point. 

 

Has anyone successfully shared the interface between altserial_flash_loader and a custom SPI core? I can find zero documentation about how to use asmi_access_request and asmi_access_granted. I assumed I just had to raise granted at some point after request went high. Then lower it at some point after request goes low... and never use the lines in the custom core while granted is high. However, that doesn't seem to work. How do I know when the JTAG is done with the flash? Are these signals supposed to be clocked by dclkin? Do they need synchronizers? Is there any documentation about this at all??? 

 

Thanks for any and all help. 

 

PS: The user core can run at up to 100MHz (which our flash chip supports) using "fast read". For now, I have been assuming the JTAG interface needs to run at 20MHz and clocked both designs down to this speed. If I get arbitration to work, I would also be interested in using altclkctrl to toggle between the frequencies when I hand-off access using granted. Can this work at all?
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Altera_Forum
Honored Contributor I
25 Views

Nevermind! I've discovered the undocumented interface behind the altserial_flash_loader: 

 

component stratixiv_asmiblock 

port( 

dclkin : in std_logic; 

scein : in std_logic;  

sdoin : in std_logic; 

data0out : out std_logic; 

oe : in std_logic); 

end component; 

 

I removed the bad clock multiplexing code in altserial_flash_loader and wrote my own. Now everything works perfectly.
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