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PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
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ddr2 controller - critical warning.

Altera_Forum
Honored Contributor II
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hello all. 

i have a problem with my ddr2 controller. 

when i try to run it with quartus (ver 9.1) i get the following critical warning: 

 

 

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the memory pin SDRAM_CK_P[0] must have it's stratix IV D4 delay chain set to 0 (the delay chain is currently set to 1) 

 

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my questions are: 

  1. how can i change the delay chain to 0? 

  2. what does this delay chain mean? 

  3. is it a symptom for a larger problem? i used the example module as base of my module but i didnt change any delay chains nor seen the option to do that.
thank you for your help.
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Altera_Forum
Honored Contributor II
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trying installing the service pack and regenerating the IP. I think this is an issue with the early timing models for SIV. 

 

There are delay chains on the IO elements that Quartus can use to meet timing for interfaces. They can be manually set in the assignment editor.
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