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Hi,
I am using altera's ddr3 uniphy controller and trying to clear the ddr3 memory content to all '0' before performing memory read and write in my simulation. Is there any quick way to do so? Is the option of turning off "Skip Memory Initialization Delays" in ddr3 uniphy megacore used to initialize the entire memory? How can I guarantee that after controller's calibration, the ddr3 memory contents are all cleared? Many thanks, XinLink Copied
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it seems that calibration does not affect contents in memory.
you can directly change the content in your ddr model.
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